Estimating size of defects or other outstanding parts in inspection images may be used in various fields of art, such as in wafer inspection. Inspection images are images in which the color value of each pixel corresponds to radiation reflected (and possibly also emitted) from a part of the inspected article (e.g. the wafer).
Some prior art techniques of defect size estimation attempt to estimate the size of the defect based on the intensity levels of the pixels in which the defect is imaged. However, such techniques of estimation are based on many assumptions—regarding the shape of the defect (usually circular), the material from which the defect is made from as well as the material from which the environment of the defect is made of (for assuming reflection coefficients), and so on.
However, failing to correctly parameterize the defect and its environment would lead to considerable errors in those techniques. For example—two defects which are of the same size but which have a different shape and/or are made from different materials (or having different textures) would reflect differently and would therefore result in different intensity levels in the inspection image, and in erroneous estimation of their respective sizes. Prior art techniques which are based solely on intensity levels would estimate such equally sized defects to be of different dimensions.
There is therefore a need for systems and methods for size estimation.
Current demands for high density and performance associated with ultra large scale integration require submicron features, increased transistor and circuit speeds and improved reliability. Such demands require formation of device features with high precision and uniformity, which in turn necessitates careful process monitoring, including frequent and detailed inspections of the devices while they are still in the form of semiconductor wafers.
A conventional in-process monitoring technique employs a two phase “inspection and review” procedure. During the first phase the surface of the wafer is inspected at high-speed and relatively low-resolution. The purpose of the first phase is to produce a defect map showing suspected locations on the wafer having a high probability of a defect. During the second phase the suspected locations are more thoroughly analyzed. Both phases may be implemented by the same device, but this is not necessary.
The two phase inspection tool may have a single detector or multiple detectors. Multiple detector two phase inspection devices are described, by way of example, in U.S. Pat. Ser. Nos. 5,699,447, 5,982,921, and 6,178,257.